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... Efficient Skewed Static Logic (S2L) Design with Dual Vt," IEEE International Symposium on Circuits and Systems, May 2001, pp. 64-70. · Chulwoo Kim, Jaesik Lee ...
Microelectronic Wire Bonding with Insulated Au Wire: Effects of Process Parameters on Insulation Removal and Crescent Bonding: Jaesik Lee, Michael Mayer, Norman Zhou and John Persic
Jaesik Lee 1), Woongho Bang 2), Jaepil Jung 1) and Kyuhwan Oh 2) Eutectic Alloys in the Sn-Zn-Mg-Al System with Eutectic Temperature of 454 K ( pp.790 - 792 )
Jenn-Ming Song, Nai-Shuo Liu and Kwang-Lung Lin 783-789: Microstructure and Strength of Sn-Bi Coated Sn-3.5 mass%Ag Solder Alloy Jaesik Lee, Woongho Bang, Jaepil Jung and ...
Flip Chip Bump Formation of Sn–1.8Bi–0.8Cu–0.6In Solder by Stencil Printing: Jaesik Lee, Jae-Pil Jung, Chu-Seon Cheon, Yunhong Zhou and Michael Mayer
... Skewed Static Logic (S2L) Design with Dual Vt," IEEE International Symposium on Circuits and Systems, May 2001, pp. 64-70. · Chulwoo Kim, Jaesik Lee ...
Microelectronic Wire Bonding with Insulated Au Wire: Effects of Process Parameters on Insulation Removal and Crescent Bonding: Jaesik Lee, Michael Mayer, Norman Zhou and ...
Jaesik Lee, Woongho Bang, Jaepil Jung and Kyuhwan Oh 790-792: Eutectic Alloys in the Sn-Zn-Mg-Al System with Eutectic Temperature of 454 K Masanori Inada and Masaki Kibe
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