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Hoskote, Y.; Vangal, S.; Singh, A.; Borkar, N.; Borkar, S. A 5-GHz Mesh Interconnect ... McIntyre, B.; Moon, P.; Neirynck, J.; Pae, S.; Parker, C.; Parsons, D.; Prasad, C ...
1 . Formal verification of SoC designs (targeting logic verification only) Masahiro Fujita. VLSI Design and Education Center (VDEC) University of Tokyo
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